The present invention relates to a data sensing scheme of a memory device, and more particularly, to a pre-processing circuit with data-line direct current (DC) immune clamping and associated method and sensing circuit.
Typically, a sensing circuit is used to read data from a memory cell of a memory array. The sensing circuit is capable of sensing a low voltage signal representative of a data bit stored in the memory cell, and amplifying the low voltage signal to a high voltage signal for further processing. A sensing circuit's power consumption should be as low as possible in order to achieve targets for ultra-low power applications. Hence, there is a need for an innovative low power sensing scheme that can be applied to a variety of memory devices.